MosChip Technologies jobs, judged for you, free

What they do

MosChip Technologies is a silicon and product engineering services company. It designs custom chips (turnkey ASICs) from spec to silicon. It also builds hardware, device software, and AI systems for clients in semiconductors, consumer electronics, automotive, energy, and industrial IoT. It has more than 1,500 engineers in India and the US. It is listed on the BSE and the NSE.

What they value

• Challenging goals, and work beyond the assigned role.
• Collaboration across different backgrounds.
• Innovation in IoT and semiconductors.
• Learning through training programs and certifications.
• Shared success, with acknowledgement and reward for every employee.
• An "Employee First" workplace with trust, transparency, and teamwork.

Where they hire

Of the 33 Postings, 27 are in Hyderabad and 16 are in Bengaluru. Many are open in both cities, and one is also open in Pune. Four roles are in the US: three in the Bay Area and one remote sales role on the East Coast. A Bay Area DFT contract is only for green card holders and US citizens.

Teams and roles

Twenty-eight Postings are engineering roles across the chip design flow, from engineer to senior lead.

• Design for test (DFT): eight roles, one of them a contract in the Bay Area.
• RTL and ASIC design: seven roles, including a principal lead for high-speed Ethernet in the Bay Area.
• Physical design and timing analysis (STA): four roles.
• Analog layout and analog design: four roles.
• ASIC verification: three roles.
• Emulation and board hardware design: one role each.

The other five Postings are a website and SEO marketer, a travel desk executive, an inside sales executive in Bengaluru, and two sales managers in the US.

What they look for

Most engineering roles ask for 3 or 4 years at the entry level and up to 12 to 15 years for senior leads. RTL design roles ask for Verilog and SystemVerilog, and verification roles add UVM. Physical design, layout, and verification roles name Cadence or Synopsys tools. Many roles ask for scripting in Perl, Tcl, or Python. Physical design and senior RTL roles ask for work at 7nm or smaller nodes. DFT roles ask for an MS or PhD. Layout and analog roles work directly with clients.